Commit Graph
9 Commits
Author SHA1 Message Date
hugodearaujo 9895d130c4 fix(libSceAgc): accept register range values at any byte address, as the console does 2026-10-18 11:59:50 -03:00
XairRrR f991052cfd test(agc): an empty register list into a null buffer still throws
AI-assisted: yes
2026-10-15 02:54:50 +02:00
XairRrR cf914b5102 fix(agc): write nothing for an empty register list
sceAgcCbSetShRegistersDirect and the other register list writers threw on
a count of 0 although the matching size functions report 0 words for it.
PPSA05684 calls the writer with an empty list at its main menu and
terminated. An empty list now writes no packet and returns the cursor,
as its size says; a null buffer still throws.

AI-assisted: yes
2026-10-14 20:50:00 +02:00
Chad 7ea5898f10 fix(agc): ignore the count passed to the indirect register GetSize functions 2026-10-10 17:42:05 -05:00
Dean b33ac687c9 Merge pull request #1029 from hugodearaujo/feat/agc-dcb-set-cf-register
feat(libSceAgc): implement sceAgcDcbSetCfRegisterDirect and RangeDirect
2026-10-07 17:58:36 +13:00
hugodearaujoandClaude Opus 5.5 8ab5fab84a feat(libSceAgc): implement sceAgcDcbSetCfRegisterDirect and RangeDirect
Write SET_CONFIG_REG (0x68) packets like the context, shader and user
config register setters: one register from a ShaderRegister, or a range
of values at an offset.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-06 22:52:29 -03:00
alfalfa-starandClaude Opus 5.5 6b6b93e26b fix(agc): accept indirect register placeholders without an address
Unreal Engine reserves SET_*_REG_INDIRECT packets with a null register
list and no registers, and fills them in later with the
sceAgcSet*RegIndirectPatch* functions. The writers rejected the null
address. A null list is now accepted when it holds no registers, which
reads nothing; a null list with registers still throws.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-06 16:16:23 +02:00
DotDebianandClaude Opus 5.5 dd9a62f2a3 feat(agc): implement the Sh and Uc RegistersDirect size queries
sceAgcCbSetShRegistersDirectGetSize and sceAgcCbSetUcRegistersDirectGetSize
return the bytes their writers need when no two registers are adjacent: one
three-word packet per register. Adjacent registers are merged into ranges
and take less. A count whose size does not fit 32 bits throws.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-05 01:07:40 +02:00
carman24r 6032ba4af9 Create RegisterCommands.cpp
new regression tests.
2026-09-29 16:08:47 -04:00