Commit Graph
406 Commits
Author SHA1 Message Date
Adrià 489466d3f9 Merge pull request #5734 from YossiYad/fix/strip-last-provoking
fix(agc): refuse last-vertex strips only for reads of a vertex slot
2026-10-15 15:03:44 +02:00
Adrià 3ee5371915 Merge pull request #5627 from AlxcBTW/fix/agc-htile-written-by-any-kernel
fix(agc): take depth fast clears from HTILE written by any kernel
2026-10-15 14:52:34 +02:00
Adrià b3f9f89e62 Merge pull request #5604 from babyhuey/fix/agc-geometry-vgpr-count
fix(agc): accept geometry programs with fewer GS and ES input VGPRs
2026-10-15 13:59:30 +02:00
AlxcBTW cc022df348 fix(agc): take a slice of a depth array from its own HTILE only when its words are uniform
A fill or clear the driver recognizes over an HTILE drops the range's last-read generation, so the
next bind reads the words and stores them back even when the write tracker did not see the fill's
stores. A depth view of slice 1 or later reads the HTILE at its own address
(DB_HTILE_DATA_BASE + slice * HtileMetadataBytes); the HTILE word layout is only modelled for slice 0,
so such a slice takes the clear and the store-back only when all its words are equal and keeps its
fill-time fast clears otherwise. DepthTarget::slice carries DB_DEPTH_VIEW SLICE_START.

agc_driver_depth_fast_clear_submit: an unrecognized kernel clears the HTILE on two frames in a row and
both clears are taken; slice 1 with words that are not all equal is refused and stored back untouched;
slice 1 with equal words takes the clear. agc_driver_graphics checks the decoded slice.
2026-10-15 13:53:50 +02:00
Adrià 39d3ae13eb Merge pull request #5304 from tv7/fix/stencil-ref-export-unused
fix(agc): drop an unused stencil test value export from draws without a stencil test
2026-10-15 13:24:56 +02:00
NikoandClaude Opus 5.5 c434467f6c fix(agc): form reversed-order blend factors from copies of the export
The reversed-order blend computed the factors Vulkan cannot apply per
channel in the pixel shader (1 - x in fp32, a clamp for UNORM targets
and, when both positions needed it, a premultiplied export) and passed
them to the blend as a dual-source second color. A plain blend converts
the export once and forms 1 - x and the products from that converted
value, so the two paths can round differently. On UNORM8 the difference
reaches one step per substituted factor: an Intel iGPU stored 161 where
the exact blend is 159.75 for SRC_COLOR + ONE_MINUS_SRC_COLOR with an
export of 0.5 over 192 (160 through SWAP_STD), and on an RTX 5080 and
lavapipe the split path differed from the same draw into a SWAP_STD
target by up to 2 steps on other inputs.

The pixel shader now only copies values. Each channel of the second
color is the exported alpha, the channel's own export or the constant 0
or 1, and a channel of the first color whose source factor is ONE may
become 1 with its export moved into the factor. Every factor, 1 - x and
product comes from the blend through SRC1_COLOR, SRC1_ALPHA and their
ONE_MINUS forms, applied to copies of the same export values that the
first color carries. TranslateReversedBlend searches for Vulkan factors
and copy routes that reproduce each channel's guest factors and throws
for combinations no routing reproduces, such as ONE_MINUS_SRC_ALPHA in
the alpha equation next to SRC_COLOR in the color equation: of the 1995
factor combinations the shader used to compute, 932 are routed and the
others throw again, as on main. GT7's 0x65010504 is among the routed
ones. The code is now four 2-bit routes for each color, the same for
every format, and the post-pass emits no arithmetic.

agc_driver_reversed_order_blend also draws each case into a SWAP_STD
target, which Vulkan blends alone, and requires identical stored bits;
the comparison with the exact blend keeps its 1-step tolerance.
agc_driver_graphics checks every factor combination TranslateReversedBlend
accepts against the guest equations and that the post-pass adds no
arithmetic instructions.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-15 12:51:27 +02:00
NikoandClaude Opus 5.5 16ea32c97d feat(agc): blend into color targets with a reversed component order
8_8_8_8 and 16_16_16_16 targets with COMP_SWAP 2 or 3 keep the exported
alpha in their first channel and red or blue in their fourth, so a plain
Vulkan blend would run the alpha equation on a color channel. Such draws
threw "blending into a color target with a reversed component order is
not implemented" (Gran Turismo 7, #4782).

The AMD SI and CIK register references describe CB_TARGET_MASK in the
order of components after blending and before COMP_SWAP is applied, and
RADV programs CB_BLENDn_CONTROL without regard to the swap while it
renders R4G4B4A4, B4G4R4A4, R5G5B5A1 and B5G5R5A1 through SWAP_STD_REV
and SWAP_ALT_REV and passes the CTS blend tests on Navi10. The color
block is therefore taken to blend in export order: the alpha equation
and source-alpha factors use the exported alpha and the destination
alpha is the first channel.

TranslateReversedBlend keeps the factor pairs Vulkan applies per channel
in the pipeline. Other source factors are computed by the pixel shader
from its MRT0 export (clamped for UNORM targets, as BLEND_CLAMP says)
and handed to the blend as a dual-source second color, which the
fragment output post-pass adds at location 0 index 1; when both
positions need it, the export is premultiplied by its source factor.
The code is a pipeline specialization, serialized in request version
26, and stays out of the prepared shader key.

sRGB, SNORM and integer targets, constant and second-source factors,
destination alpha in the color equation, destination factors the two
equations do not share, different color and alpha operations, MIN or
MAX with factors other than ONE, other color exports when the shader
computes factors, and devices without dualSrcBlend still throw, now
with the blend control, mapping and format in the message.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-15 12:51:27 +02:00
fdfawef324andCodex 3490838653 fix(agc): omit reference-independent stencil exports
Co-Authored-By: Codex <noreply@openai.com>
2026-10-15 12:51:24 +02:00
Dean 721db55dcd Merge pull request #6066 from meh7an/perf/agc-register-read-log-when-open
perf(agc): skip the register read log while no log is open
2026-10-15 21:45:35 +13:00
Dean db4e4b071f Merge pull request #5893 from ThatsLeo/perf/agc-unified-memory-budgets
perf(agc): keep a smaller staging pool on system-memory heaps
2026-10-15 21:44:40 +13:00
Adrià 2baae7aa30 Merge pull request #6168 from parl0v/fix/detiler-pool-recycle
fix(agc): recycle detiler descriptor pools once their batches complete
2026-10-15 10:43:52 +02:00
Adrià FranchandClaude 15734fb3fa fix(agc): keep detiler descriptor pools unrecycled without a recorder
Co-Authored-By: Claude <noreply@anthropic.com>
2026-10-15 10:14:29 +02:00
Dean d92a8dad39 Merge pull request #1189 from MichonGoddijn231849/fix/cb-resolve-tiled-targets
fix(agc): CB resolve into any tiled color target
2026-10-15 17:15:57 +13:00
Josip Parlov 0e15b9be97 fix(agc): reuse the current detiler descriptor pool once its batches complete
When the current pool filled, the search for a completed pool started after it and skipped it, so a
title whose batches had all completed got a new pool instead of resetting the full one. The search
now ends at the current pool. A detiler test fills three pools' worth of sets with no batch in
flight and requires the pool count to stay the same.
2026-10-15 02:17:14 +02:00
fdfawef324 1ffc5f672b feat(agc): emulate per-pixel multisample coverage masks
Decode the four PA_SC_AA_MASK fields at the rasterized sample count. Use the native Vulkan mask when all four pixels agree and apply varying masks in the fragment shader, preserving helpers and combining coverage with alpha-to-coverage and shader mask exports. Add the normalized masks to pipeline, draw and shader keys and the versioned replay request.

Refuse unsupported conservative-raster, centroid and early depth/stencil memory-write cases. Synthetic readbacks cover driver submission, depth/stencil suppression, fragment stores and one-sample and four-sample coverage.
2026-10-15 13:00:34 +13:00
Michon 72518f64fb feat(agc): single-sample sample masks as a per-quad-pixel discard
With one sample, PA_SC_AA_MASK leaves one coverage bit per pixel of the 2x2 quad,
so a draw can cover only some pixels of every quad (GTA V renders a target one
quarter of the pixels at a time this way). The pixel stage info carries that 4-bit
mask; a fragment shader whose mask is not full starts by killing the invocation
unless its gl_FragCoord quad position is covered, and runs without early fragment
tests. The mask is part of the recompile cache key and the serialized request
(version 24). Sample masks of multisampled draws stay refused.
2026-10-15 12:59:39 +13:00
Dean 4bdfc9c801 Merge pull request #5631 from moong15/codex/skip-unused-pixel-stage
fix(agc): skip unused pixel stages with retained export formats
2026-10-15 12:33:48 +13:00
Dean 28fb252c62 Merge pull request #4341 from MarcZX100/codex/accept-vertex-stage-2002008-4329
fix(agc): accept reported vertex stage state
2026-10-15 12:14:32 +13:00
umang 843f7e963e fix(agc): skip unused pixel stages with retained export formats 2026-10-15 11:35:54 +13:00
Dean 80ccb9fb1e Merge pull request #5483 from ee6aba54/fix/agc-storage-cache-budget
fix(agc-driver): size the storage image cache from the device's reported memory budget
2026-10-15 11:26:11 +13:00
MichonandClaude Opus 5.5 a17f25b5ae test(agc): CB resolves into 4 KiB and 64 KiB standard targets
The resolve decode keeps a SW_4KB_S, SW_64KB_S and SW_64KB_R_X destination's tile mode. An execution case
(ctest agc_tiled_resolve) fast-clears a 4x source through its CMASK and resolves it into each of those
targets, reading the resolved color back from guest memory; a linear destination still throws.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
2026-10-15 10:32:36 +13:00
Yossi Yadgar e8ab547b2c test(agc): check the strip guard on interpolated and slot-read inputs
A pixel shader that interpolates its input with v_interp_p1/p2 compiles
to a per-vertex input without vertexOrder and passes a last-vertex
strip; the same input read through v_interp_mov P10 is vertexOrder and
still throws on a strip, not on a list. The synthetic matrix gets
vertexOrder as a third axis. The first check fails with the guard on
perVertex, the second without the v_interp_mov record.
2026-10-15 00:15:10 +03:00
Mehran ec615c145a perf(agc): skip the register read log while no log is open 2026-10-15 00:00:31 +03:00
Adrià f2aa48a8e2 Merge pull request #5402 from codingreapermaps/feat/agc-fractional-even-partitioning
fix(agc): accept fractional-even tessellation partitioning
2026-10-14 22:57:20 +02:00
Adrià 33001cebda Merge pull request #5466 from fdfawef324/codex/stencil-export-emulation
feat(agc): replay proven finite stencil reference exports
2026-10-14 22:49:30 +02:00
fdfawef324andCodex 77521f7ad2 feat(agc): replay proven finite stencil reference exports
Preserve instance and triangle order with one dynamic-reference shader pipeline. Require bounded references, complete export coverage, replay-safe mask control and resources; refuse unsupported side effects and feedback.

Co-Authored-By: Codex <noreply@openai.com>
2026-10-14 22:08:35 +02:00
XairRrR 8dbf06798c fix(shader): honour SPI_BARYC_CNTL.FRONT_FACE_ALL_BITS for the front-face input
The front-face VGPR was always +1.0 / -1.0, which is its form only while
FRONT_FACE_ALL_BITS is clear (current Mesa reads it with fgt 0 / fsign).
With the bit set, as Mesa 22.0 RADV programs it, a back face reads 0 and
a front face non-zero: ACO then tests it with v_cmp_lg_u32 0. Uncharted:
Legacy of Thieves Collection (PPSA05684) sets the bit and its two-sided
cloth shaders test v_cmp_lt_u32 0, so -1.0 (0xbf800000) made every back
face a front face: the insides of the menu skeleton's rags kept their
front normals and were lit white by the spot light behind them.

The pixel stage info now carries the bit (request version 26, cache and
draw keys), the decode reads SPI_BARYC_CNTL when FRONT_FACE is an active
input, and the translator turns the builtin into 0xffffffff / 0. The
exact front value is not measured (docs/dev/debt/shader.md).

AI-assisted: yes
2026-10-14 21:37:48 +02:00
codingreapermapsandClaude Opus 5.5 f8e8aca5c1 fix(agc): accept fractional-even tessellation partitioning
VGT_TF_PARAM.PARTITIONING 3 now compiles to Vulkan's fractional-even
spacing, which radeonsi programs as PART_FRAC_EVEN. Its factors are
bounded at 64 like integer partitioning; Vulkan raises the remaining
ones to at least 2, the D3D11 range for this mode.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-14 21:16:21 +02:00
Adrià e6e36c1187 Merge pull request #5321 from lubaxe/fix/agc-registered-cover-adjacent-ranges
fix(agc): count adjacent registered allocations as covering a storage-image write-back
2026-10-14 20:57:28 +02:00
Adrià c5f6269796 Merge pull request #4767 from Swastik-51/fix/agc-fmask-decompress-msaa
fix(agc): handle FMASK decompress on MSAA targets
2026-10-14 20:31:07 +02:00
Swastik-51 02974ea767 fix(agc): reject DCC on multisampled targets outside FMASK decompress 2026-10-14 19:49:32 +02:00
Swastik-51 8c76693344 test(agc): tighten FMASK decompress tests 2026-10-14 19:49:32 +02:00
Swastik-51 9394a6f51a fix(agc): handle FMASK decompress on MSAA targets 2026-10-14 19:49:32 +02:00
XairRrR 8fec47a4b2 fix(agc): give each slice of a depth array its own HTILE
A slice of a depth array target (DB_DEPTH_VIEW SLICE_START) offset its
depth and stencil addresses but kept the array's DB_HTILE_DATA_BASE as
its HTILE. Every slice then shared slice 0's metadata: a fast clear of
slice 0's HTILE cleared every slice, and a clear of any other slice's
HTILE matched none.

A slice's HTILE now starts at the base plus the slice times one slice's
pipe-aligned metadata, as addrlib addresses it (sliceSize * slice in
Gfx10Lib::HwlComputeHtileAddrFromCoord; HtileMetadataBytes is that slice
size). The recognized HTILE clear kernel now reports the bytes it
clears, 16 per thread (global_store_dwordx4 at the thread index << 4),
and a surface takes the clear when that range covers its HTILE, as a
DMA_DATA fill does; a clear over a whole array still clears every slice.

Uncharted: Legacy of Thieves Collection (PPSA05684) renders its sun
shadow cascades into the four slices of a 2048x2048 D16 array; each
slice's HTILE lies 256 KiB after the previous one.
2026-10-14 19:45:03 +02:00
Adrià 763ad20fc1 Merge pull request #757 from Celegans12/feat/agc-image-tables
feat(agc): implement image and sampler tables indexed at runtime offsets
2026-10-14 17:48:32 +02:00
Adrià 979ad7b6aa Merge pull request #5861 from simonbronk/feat/sample-location-grid
feat(agc): rasterize sample locations that vary between pixels through a 2x2 grid
2026-10-14 16:44:29 +02:00
Celegans12 d9e47d1e98 feat(agc): implement image and sampler tables indexed at runtime offsets
Materialize runtime-indexed image and sampler records into descriptor
tables while keeping descriptor selection in the shader. Report invalid
active entries through the existing deferred fault buffer.

Bind fragment tables in the fragment set when pipeline libraries split it,
and reserve a physical descriptor for empty tables. Reject unsupported
sampler, border, cube and anisotropic pairings per entry. Keep one column
per heap access shape, one T# shared by several image operations included
(milescoviello's #5550 case), and narrow it to the union of its keys'
domains when every key has one (SleglJan's key-domain changes). Plan
columns read at (key << n) & mask over their whole domain (tibzejoker's
fix). Read records in runs through SleglJan's bulk reader, and reject
entries whose surface has no mapped byte, as Tamalero proposed. Store
table columns in disk plans; update the runtime ABI and disk format. Bound
table-sized entries in the resource cache (65,536 table elements) and the
dispatch cache (256 MiB of captured words), evicting LRU.
2026-10-14 16:43:57 +02:00
ThatsLeo 878c303786 perf(agc): keep a smaller staging pool on system-memory heaps
On a device whose largest device-local heap has only host-visible memory
types (integrated GPUs), the staging pool's device tier holds system RAM:
it now retains a sixty-fourth of the heap, at least 128 MiB.
2026-10-14 16:39:54 +02:00
simonbronkandClaude Opus 5.5 b6cde56981 feat(agc): rasterize sample locations that vary between pixels through a 2x2 grid
PA_SC_AA_SAMPLE_LOCS_PIXEL_* patterns that differ between the four pixels
of the guest's 2x2 grid threw. Pass them through VK_EXT_sample_locations
as a 2x2 sample location grid on devices whose maxSampleLocationGridSize
for the sample count allows it.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-14 15:53:28 +02:00
ps54allandClaude Sonnet 5.5 af7ca4af50 feat(agc): run the pixel program per sample for PS_ITER_SAMPLE
PA_SC_MODE_CNTL_1 bit 16 (PS_ITER_SAMPLE) was rejected with the other scan
control bits. On a multisampled draw it now enables Vulkan sample shading with
a minimum rate of 1.0, and the draw throws when the device lacks
sampleRateShading. On a single-sample draw the bit has no effect and is
dropped. The flag is part of the pipeline, pipeline library and draw register
keys.

Co-Authored-By: Claude Sonnet 5.5 <noreply@anthropic.com>
2026-10-14 14:53:42 +02:00
Adrià 1015c55ee8 Merge pull request #5324 from lubaxe/feat/agc-store-pending-at-label
feat(agc): store pending storage-image results before each GPU label with APS5_STORE_AT_LABEL
2026-10-14 14:18:57 +02:00
Sasha PapoandClaude Opus 5.5 d756f525fc feat(agc): store pending storage-image results before each GPU label with APS5_STORE_AT_LABEL
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-14 13:40:18 +02:00
Adrià Franch 6d7b1d11bb test(agc): pin that the content key reserves exactly its serialized word count 2026-10-14 13:07:04 +02:00
Scramblrrrr 00fe89c536 perf(agc): reserve resource keys for their serialized payload 2026-10-14 13:07:04 +02:00
Dean de2ab1068a Merge pull request #4797 from gjonn/fix/ps-sample-interp-bary
fix(shader): load the PERSP_SAMPLE and LINEAR_SAMPLE I/J pairs
2026-10-14 23:55:50 +13:00
Adrià 82f112d20f Merge pull request #4451 from Amoenus/codex/feat-alpha-to-coverage-dither8
feat(agc): emulate default eight-sample dithered alpha coverage
2026-10-14 12:55:07 +02:00
ee6aba54 64ffeb8c9f fix(agc-driver): size the storage image cache from the device's reported memory budget
The storage image cache kept a quarter of the device-local heap (4 GiB on a
16 GiB card) regardless of how much of the heap the driver reports as usable.
With a desktop and other allocations the reported budget is about 10 GiB, the
cache stayed full at 4 GiB, and after minutes of a cutscene device buffer
allocations failed with VK_ERROR_OUT_OF_DEVICE_MEMORY. The cache budget is now
the smaller of that quarter of the heap and a quarter of the reported budget,
at least 512 MiB, read once per second; APS5_TEXTURE_CACHE_MIB still overrides
it. The budget report names the storage budget in use. A test covers the limits.
2026-10-14 12:10:25 +02:00
Romans Pokrovskis 246d16a035 test(agc): preserve targetless alpha exports after rebase 2026-10-14 13:01:48 +03:00
Romans Pokrovskis c8b3a37533 feat(agc): emulate default eight-sample dithered alpha coverage 2026-10-14 12:58:43 +03:00
Dean 115dc95784 Merge pull request #5347 from MathiasDevelopes/codex/pr-agc-stencil-clear-state
fix(agc): initialize stencil control and reference masks
2026-10-14 22:48:14 +13:00