Karim Masmoudi 57e52c1f03 fix(relinker): report processor 0 from RDTSCP under --to-rosetta ...

Rosetta sets RDTSCP's ECX to its constant TSC_AUX, 0xAAAAAAAB, which is
not a processor index. --to-rosetta already makes RDPID return processor
0 for the same reason, so code reading the processor through RDTSCP saw
a different value from code reading it through RDPID.

--to-rosetta now moves RDTSCP into an optional stub that runs the
instruction unchanged and then loads 0 into ECX with a MOV, which
leaves the counter in EDX:EAX and the flags as they were. A site with no
movable instruction after it for the jump is kept, as for RDPID. The
Intel target and a plain relink are unchanged.

2026-10-18 18:27:15 +02:00

..

Amd64OnlyConverterTests.cpp

fix(relinker): report processor 0 from RDTSCP under --to-rosetta

2026-10-18 18:27:15 +02:00

AndnLoweringTests.cpp

fix(relinker): lower ANDN in Rosetta conversion

2026-10-15 15:00:43 +02:00

DecoderLengthCases.hpp

fix(relinker): decode near branches with an operand-size prefix as AMD does

2026-10-17 20:58:29 +00:00

DecoderLengthTests.cpp

fix(relinker): decode near branches with an operand-size prefix as AMD does

2026-10-17 20:58:29 +00:00

DecoderMetadataCases.hpp

fix(relinker): decode near branches with an operand-size prefix as AMD does

2026-10-17 20:58:29 +00:00

RewriteBoundaryTests.cpp

fix(codegen): reject rewrites inside instructions

2026-10-11 19:56:00 +04:00