Dean 989b6ea794 Merge pull request #7999 from mopga/fix/relinker-amd-only-sequence-in-place ...

fix(relinker): move in-place AMD-only replacements into a short instruction's stub

2026-10-21 06:19:51 +13:00

..

Amd64OnlyInstructionMatcher.cpp

Merge pull request #7999 from mopga/fix/relinker-amd-only-sequence-in-place

2026-10-21 06:19:51 +13:00

AndnLowering.cpp

fix(relinker): lower ANDN in Rosetta conversion

2026-10-15 15:00:43 +02:00

ClzeroLowering.cpp

feat(relinker): relocate RIP-relative operands into --to-intel stubs

2026-10-08 11:10:38 +02:00

ClzeroOperands.cpp

fix(relinker): ignore a REX prefix that is followed by another prefix

2026-10-01 13:09:11 +02:00

DecodedInstruction.cpp

fix(relinker): report processor 0 from RDTSCP under --to-rosetta

2026-10-18 18:27:15 +02:00

ReciprocalLowering.cpp

fix(relinker): lower legacy packed reciprocal register instructions

2026-10-11 10:58:14 -03:00

ReciprocalOperands.cpp

fix(relinker): lower legacy packed reciprocal register instructions

2026-10-11 10:58:14 -03:00

ScalarCompareOperands.cpp

fix(relinker): move legacy CMPSS and CMPSD out of line for Rosetta

2026-10-14 11:48:11 +02:00

Sha1Lowering.cpp

feat(relinker): relocate RIP-relative operands into --to-intel stubs

2026-10-08 11:10:38 +02:00

Sha1Operands.cpp

feat(relinker): relocate RIP-relative operands into --to-intel stubs

2026-10-08 11:10:38 +02:00

Sha256Lowering.cpp

feat(relinker): relocate RIP-relative operands into --to-intel stubs

2026-10-08 11:10:38 +02:00

Sha256Operands.cpp

feat(relinker): relocate RIP-relative operands into --to-intel stubs

2026-10-08 11:10:38 +02:00

Sse4aLowering.cpp

feat(relinker): relocate RIP-relative operands into --to-intel stubs

2026-10-08 11:10:38 +02:00

Sse4aOperands.cpp

fix(relinker): ignore a REX prefix that is followed by another prefix

2026-10-01 13:09:11 +02:00

StubBodyBuilder.cpp

Merge pull request #6325 from amirerfantim/refactor/relinker-remove-dead-code

2026-10-19 01:17:30 +02:00

WideStoreLowering.cpp

feat(relinker): split unaligned 256-bit stores for Rosetta

2026-10-12 02:48:33 +00:00

WideStoreOperands.cpp

feat(relinker): split unaligned 256-bit stores for Rosetta

2026-10-12 02:48:33 +00:00

X64InstructionDecoder.cpp

fix(relinker): decode near branches with an operand-size prefix as AMD does

2026-10-17 20:58:29 +00:00

X64InstructionRewriter.cpp

fix(codegen): reject rewrites inside instructions

2026-10-11 19:56:00 +04:00