Celegans12 a40fe0b415 fix(shader): throw for constant lane reads outside the host subgroup ...

A pixel, vertex or tessellation stage whose wave is wider than the host
subgroup runs one guest lane per invocation, so lanes at or above the
subgroup size have no invocation. v_readlane_b32 still shuffled from
them, which Vulkan leaves undefined; a wave64 pixel minimum loop that
reads lanes 31 and 63 can then wait for a value no live lane holds and
hang the GPU.

At one lane per invocation outside compute, a v_readlane_b32 of a
constant lane at or above the host subgroup size, and v_permlanex16_b32
on a subgroup of 16 lanes or fewer, now fail SPIR-V emission. Lanes in
registers still build, so s_ff1_i32_b64 waterfalls are unaffected,
and neither check applies to compute or to two lanes per invocation.

v_permlane16_b32 and v_permlanex16_b32 take the source lane's EXEC from
a ballot, as DPP does, instead of a shuffle from a possibly inactive
invocation.

2026-10-07 00:25:55 +02:00

..

BUILD.md

test(agc): validate pixel LDS and expose pipeline statistics

2026-10-04 23:04:39 -03:00

CONVENTIONS.md

refactor(docs): separated user and dev in docs + compatibility file

2026-09-28 22:58:17 +03:00

HW_ORACLE.md

feat(tools): add a hardware oracle for RDNA instruction semantics

2026-10-06 13:54:28 +02:00

TechnicalDebt.md

fix(shader): throw for constant lane reads outside the host subgroup

2026-10-07 00:25:55 +02:00