From 6ea0b349e6e05bde1d7a8701b575efceda33fcd1 Mon Sep 17 00:00:00 2001 From: Lev Voronov Date: Mon, 21 Sep 2026 15:03:10 +0300 Subject: [PATCH] stm32: add PB4/PB5 hardware pwm pins on the stm32f1 TIM3 channels 1 and 2 are available on PB4 and PB5 through the timer's partial remap. gpio_peripheral() already programs TIM3_REMAP_PARTIALREMAP for those two pins, but they were missing from the stm32f1 hardware pwm table, so a config naming them was rejected as "Not a valid PWM pin". The stm32f0 and stm32h7 tables already list them. Signed-off-by: Lev Voronov --- src/stm32/hard_pwm.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/stm32/hard_pwm.c b/src/stm32/hard_pwm.c index ef77f3fbc..2e5e9e348 100644 --- a/src/stm32/hard_pwm.c +++ b/src/stm32/hard_pwm.c @@ -99,6 +99,8 @@ static const struct gpio_pwm_info pwm_regs[] = { {TIM3, GPIO('A', 7), 2, GPIO_FUNCTION(1)}, {TIM3, GPIO('B', 0), 3, GPIO_FUNCTION(1)}, {TIM3, GPIO('B', 1), 4, GPIO_FUNCTION(1)}, + {TIM3, GPIO('B', 4), 1, GPIO_FUNCTION(2)}, + {TIM3, GPIO('B', 5), 2, GPIO_FUNCTION(2)}, {TIM3, GPIO('C', 6), 1, GPIO_FUNCTION(2)}, {TIM3, GPIO('C', 7), 2, GPIO_FUNCTION(2)}, {TIM3, GPIO('C', 8), 3, GPIO_FUNCTION(2)},