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Merge pull request #6725 from johandavidcm/fix/agc-depth-write-address
fix(agc): compare the depth write base only when the depth plane is written
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@@ -317,7 +317,8 @@ void decodeDepth(const Registers& cx, std::uint32_t depthControl, bool testValEx
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depth.lastSlice = (view >> 13u) & 0x7ffu;
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depth.address = zFormat != 0 ? base(0x012, 0x01a) : 0;
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depth.stencilAddress = stencil ? base(0x013, 0x01b) : 0;
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Require(zFormat == 0 || depthReadOnly || base(0x014, 0x01c) == depth.address, "depth read and written at different addresses is unsupported");
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const bool depthWritten = zFormat != 0 && !depthReadOnly && (depthClear || (depthControl & 6u) == 6u || (read(cx, 0x000) & 0x60u) != 0);
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Require(!depthWritten || base(0x014, 0x01c) == depth.address, "depth read and written at different addresses is unsupported");
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Require(!stencil || stencilReadOnly || base(0x015, 0x01d) == depth.stencilAddress, "stencil read and written at different addresses is unsupported");
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if (depth.samples != 1u) {
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depth.pipeBankXor = static_cast<std::uint32_t>(depth.address & 65535u);
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@@ -2134,6 +2134,23 @@ void DepthStencilTests() {
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const auto rejection = AgcDriver::Graphics::DrawRejection(queue, false);
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Require(rejection.empty(), "precheck rejected a stencil draw with a surface: " + rejection);
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Require(state.depth && state.depth->address == 0x10000 && state.depth->stencilAddress == 0x20000 && state.depth->format == VK_FORMAT_D32_SFLOAT_S8_UINT && state.depth->clearStencil == 7 && state.depth->htileAddress == 0x10000030000ull && !state.depth->htileStencil, "depth surface decode changed");
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{
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auto split = queue;
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split.context[0x014] = 0;
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for (const auto control : {0x00700711u, 0x00700715u, 0x00700713u}) {
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split.context[0x200] = control;
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const auto splitState = AgcDriver::Graphics::DecodeState(split);
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Require(splitState.depth && splitState.depth->address == 0x10000 && !splitState.depthWrite, "a depth plane the draw does not write rejected another write address");
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Require(AgcDriver::Graphics::DrawRejection(split, false).empty(), "precheck rejected a depth plane the draw does not write at another write address");
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}
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split.context[0x200] = 0x00700717u;
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expectFailure([&] { AgcDriver::Graphics::DecodeState(split); }, "depth read and written at different addresses");
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split.context[0x200] = 0x00700711u;
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for (const auto control : {0x01u, 0x20u, 0x40u, 0x60u}) {
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split.context[0x000] = control;
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expectFailure([&] { AgcDriver::Graphics::DecodeState(split); }, "depth read and written at different addresses");
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}
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}
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for (const auto clear : {0u, 1u, 2u, 3u}) {
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auto retained = queue;
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retained.context[0x8e] = retained.context[0x8f] = retained.context[0x203] = 0;
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