Commit Graph
2834 Commits
Author SHA1 Message Date
Celegans12 1afcd20281 feat(agc): implement min and max sampler reduction modes
An S# with FILTER_MODE (word0 bits 29-30) set threw in
DecodeSamplerResource. Modes 1 and 2 now map to Vulkan's MIN and MAX
sampler reduction through VK_EXT_sampler_filter_minmax, which the device
enables when it reports both filterMinmax properties; mode 3 throws.

Min/max still throws with anisotropy, a linear mip filter (lavapipe and
NVIDIA disagree there), depth comparison, color-texture compare
emulation, and, in PointFilteredSamplerWord (S# words 0 and 2), when it
filters between texels or mips of an image the recompiler point-samples.
A texture sampled through a linear min/max sampler needs
SAMPLED_IMAGE_FILTER_MINMAX on its view format; the image-sampler pairs
travel in DescriptorBinding::imageSamplers (shader disk cache format 5).

Adds the agc_driver_image_sample_reduction GPU test and extends the
sampler, emulated color compare and disk cache tests.
2026-10-07 09:04:26 +02:00
Adrià db3e659870 Merge pull request #805 from Celegans12/feat/agc-image-10-11-11-unorm
feat(agc): implement 10_11_11 unorm images through 32-bit uint views
2026-10-07 09:00:03 +02:00
alfalfa-starandClaude Opus 5.5 745412779d fix(agc): keep RADV's descriptor pool overrun inside the pool's pages
RADV (Mesa 26.0 and later) initialises a FREE_DESCRIPTOR_SET pool's
allocator with bo_size + RADV_POOL_HEAP_OFFSET as its size, so a set can
be placed up to 32 bytes past the pool's buffer. The chain pools are
0x26000 bytes, a page multiple, so a set at the end of a full pool has
its last descriptors on an unmapped page: the CPU descriptor write
faults, or the shader's scalar load raises a GPU page fault and the ring
is reset.

Two more storage buffer descriptors make the pool 0x26020 bytes; the
buffer's last page then holds those 32 bytes.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-07 08:59:10 +02:00
Adrià 78b8f058fb Merge pull request #771 from Kikoarl/feat/sopp-control-flow
feat(shader): decode s_setkill as s_endpgm
2026-10-07 08:50:36 +02:00
Adrià 8a126b7b88 Merge pull request #799 from Celegans12/feat/agc-unnormalized-sampler-coordinates
feat(agc): implement unnormalized sampler coordinates on single-level 1D and 2D views
2026-10-07 08:50:16 +02:00
Adrià FranchandClaude c50181f6fa docs(TechnicalDebt): trim s_setkill entry to the measured behaviour
Co-Authored-By: Claude <noreply@anthropic.com>
2026-10-07 08:39:47 +02:00
Kikoarl c8e4a17f89 feat(shader): decode s_setkill as s_endpgm 2026-10-07 08:39:41 +02:00
Celegans12 94cf99e361 feat(agc): implement 8 srgb color targets through rgba8 srgb proxies
CB_COLOR_INFO format 1 with number type 6 (8_SRGB) threw at decode.
It now decodes as R8_SRGB with component swap 0; the other swaps and
8_8_SRGB still throw.

A device that cannot attach and blend R8_SRGB (NVIDIA, lavapipe)
renders a resident 8_SRGB target through an RGBA8_SRGB view of an
RGBA8 copy of its R8 image: the image is blitted in before the pass
and back when the pass ends, and the write mask keeps R only, so the
encode, decode and blend are the device's sRGB attachment rules.
APS5_SRGB_ATTACHMENT_PROXY=1 forces the copy. Linear, mipmapped and
3D 8_SRGB targets throw on such a device.

PPSA26344 renders its G-buffer slot 5 and a multiply-blend pass into
8_SRGB targets.
2026-10-07 07:47:00 +02:00
alfalfa-starandClaude Opus 5.5 e91fe0f063 feat(libs): declare the exports PPSA14632 imports that no library provides
LEGO Horizon Adventures imports 19 functions that no library exports
and no open pull request adds, so it fails eager binding. They are
declared as throwing stubs. The two libSceAjmWVorbis imports have no
known name and are exported by NID from libSceAjm.native.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-07 07:10:13 +02:00
alfalfa-starandClaude Opus 5.5 b567bb8eed feat(libkernel): accept the audio coprocessor memory protection bits
A title maps direct memory with protection 0x3f2, which adds bits
0x100 and 0x200 to the CPU, GPU and AMPR bits, and the mapping threw.
They are the audio coprocessor (ACP) read and write bits, as named in
the KytyPS5 and etaHEN headers. The coprocessor work runs on the host
CPU, so they map to host read and read/write access like the GPU bits.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-07 07:09:42 +02:00
JAB-dev 2dc53674f5 Merge branch 'main' of https://github.com/boykopovar/AnyPS5 into feat/kernel-flexible-internal-hint 2026-10-07 07:09:08 +02:00
JAB-dev e493328eb7 Merge branch 'main' of https://github.com/boykopovar/AnyPS5 into feat/ngs2-reverb-rack 2026-10-07 07:01:30 +02:00
Dean cb3405d037 Merge pull request #1037 from Raghav314/fix/agc-unwritten-user-data
fix(agc): read unwritten user data registers as zero
2026-10-07 18:00:41 +13:00
Dean b62e84c8ca Merge pull request #1035 from hugodearaujo/feat/agc-register-defaults-internal
feat(libSceAgc): implement sceAgcGetRegisterDefaultsInternal
2026-10-07 18:00:00 +13:00
Dean ed8dda83ec Merge pull request #1030 from hugodearaujo/feat/agc-dcb-clear-state
feat(libSceAgc): implement sceAgcDcbClearState
2026-10-07 17:59:18 +13:00
Dean b33ac687c9 Merge pull request #1029 from hugodearaujo/feat/agc-dcb-set-cf-register
feat(libSceAgc): implement sceAgcDcbSetCfRegisterDirect and RangeDirect
2026-10-07 17:58:36 +13:00
Dean 63e02557ef Merge pull request #1026 from hugodearaujo/feat/agc-wait-reg-mem-patch-mask
feat(libSceAgc): implement sceAgcWaitRegMemPatchMask
2026-10-07 17:57:55 +13:00
Dean 1acbeefef9 Merge pull request #1032 from gjonn/feat/ngs2-stereo-surround-mix
feat(libSceNgs2.native): mix a stereo mastering voice into a 6 or 8 channel render buffer
2026-10-07 17:56:41 +13:00
hugodearaujoandClaude Opus 5.5 bdfd0287e1 feat(libSceAgc): implement sceAgcGetRegisterDefaultsInternal
Return the version 0 internal register defaults, the internal
counterpart of sceAgcGetRegisterDefaults.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-06 23:43:04 -03:00
raghav314andClaude Opus 5.5 f5a6a31b61 fix(agc): read unwritten user data registers as zero
A stage's user data registers are read for the count in its RSRC2
(COMPUTE_PGM_RSRC2 for compute). A register the title never wrote no
longer refuses the draw or dispatch: it reads 0, as Kyty and SharpEmu
read it and as AMD PAL and Mesa initialize the user data registers.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-07 08:09:54 +05:30
Dean 9ec263cec0 Merge pull request #887 from adriadam10/feat/libc-fiopen
feat(libc): implement std::_Fiopen
2026-10-07 15:30:30 +13:00
Dean 18b9994c76 Merge pull request #885 from adriadam10/feat/libc-collate-getcat
feat(libc): implement collate<char>::_Getcat
2026-10-07 15:29:48 +13:00
Dean f6f47bf1de Merge pull request #880 from adriadam10/feat/kernel-mtypeprotect-type
feat(kernel): apply the memory type in sceKernelMtypeprotect
2026-10-07 15:28:25 +13:00
Dean 1d773dad2e Merge pull request #722 from alfalfa-star/feat/libkernel-rtld-thread-atexit
feat(libkernel): implement the rtld thread atexit reference count
2026-10-07 15:27:44 +13:00
Dean e50814c9e7 Merge pull request #860 from ebosido444-ai/feat/libc-std-execute-once
feat(libc): implement std_execute_once
2026-10-07 15:25:29 +13:00
Gjon Gojcevic 5bae4df0b6 feat(libSceNgs2.native): mix a stereo mastering voice into a 6 or 8 channel render buffer
The mixing stage threw when a mastering voice and its render buffer had different channel counts. A 2-channel voice is now mixed into the first two channels of a 6- or 8-channel buffer; other mismatches still throw.
2026-10-06 22:23:40 -04:00
Celegans12 4e18def4c1 fix(agc): accept unaligned shader headers
Driver::RegisterShader required the Shader header at an 8-byte
boundary (alignof(Shader)) and read its fields through the pointer.
PPSA26344 uses its shader packs in place: its compute shader objects
point at headers 4 and 1 bytes past an 8-byte boundary, so the first
sceAgcCreateShader of such a header threw "null or misaligned address".

The header is now checked for null and readable memory at any
address, and its fixed fields and the registers the trace prints are
copied out with memcpy. The code address must still be 256-byte
aligned, and the header and size checks are unchanged. The console's
rule is unknown and is listed in TechnicalDebt.
2026-10-07 04:23:21 +02:00
Dean 6e2c1f8992 Merge pull request #965 from hugodearaujo/feat/agc-async-cond-exec-patch
feat(libSceAgc): implement the async COND_EXEC patches
2026-10-07 15:21:47 +13:00
Dean 8545f330f1 Merge pull request #963 from JAB-dev/feat/agc-registration-max-name-length
feat(libSceAgcDriver): implement sceAgcDriverGetResourceRegistrationMaxNameLength
2026-10-07 15:21:05 +13:00
Dean 990c69645d Merge pull request #936 from CnRJay/feat/agc-write-data-patch
feat(libSceAgc): implement the WRITE_DATA destination and cache policy patches
2026-10-07 15:19:43 +13:00
Dean f8975a8ef8 Merge pull request #1015 from hugodearaujo/feat/agc-dcb-end-of-shader-action-size
feat(libSceAgc): implement sceAgcDcbQueueEndOfShaderActionGetSize
2026-10-07 15:18:50 +13:00
Dean f1efcc6786 Merge pull request #975 from hugodearaujo/feat/agc-cb-cond-write
feat(libSceAgc): implement sceAgcCbCondWrite
2026-10-07 15:17:27 +13:00
Dean e4048a0989 Merge pull request #709 from merwie/fix/videoout-unsupported-output-mode
fix(videoout): report unavailable output modes instead of throwing
2026-10-07 15:15:22 +13:00
Gjon Gojcevic 74a7a1d9f1 fix(libSceNgs2.native): take (path, offset, info) in sceNgs2ParseWaveformFile and reject PCM data that does not fit
The call site of PPSA21402 sets only three argument registers, so the function has no size parameter. A data chunk that runs past the buffer or ends inside a frame returns INVALID_WAVEFORM_DATA instead of being shortened. The test no longer writes padding from a string literal.
2026-10-06 22:14:23 -04:00
Gjon Gojcevic 64230cf95a feat(libSceNgs2.native): implement sceNgs2ParseWaveformFile and parse 16-bit PCM waveforms 2026-10-06 22:14:23 -04:00
hugodearaujoandClaude Opus 5.5 425ed24795 feat(libSceAgc): implement sceAgcDcbClearState
Write the 2-dword CLEAR_STATE (0x12) packet with a 4-bit command, the
packet the driver already validates and executes by restoring the
initial context registers.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-06 23:06:15 -03:00
Dean 66e0a1e9c5 Merge pull request #1019 from fisherjoey/feat/agc-semaphore-memory-register-multiple
feat(agc): declare sceAgcSetSemaphoreMemory and sceAgcDriverRegisterMultipleResources
2026-10-07 15:04:53 +13:00
hugodearaujoandClaude Opus 5.5 8ab5fab84a feat(libSceAgc): implement sceAgcDcbSetCfRegisterDirect and RangeDirect
Write SET_CONFIG_REG (0x68) packets like the context, shader and user
config register setters: one register from a ShaderRegister, or a range
of values at an offset.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-06 22:52:29 -03:00
hugodearaujoandClaude Opus 5.5 54eeadb3a2 feat(libSceAgc): implement sceAgcWaitRegMemPatchMask
Patch the mask of a wait packet like sceAgcWaitRegMemPatchReference
patches its reference: a 32-bit value written to the low mask word of a
32- or 64-bit WAIT_REG_MEM, rejected above 32 bits.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-06 22:34:29 -03:00
raghav314andClaude Opus 5.5 60e16537dc docs: record the AJM resample assumptions in technical debt
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-07 05:41:46 +05:30
Joey Fisher 23a6859a51 feat(agc): declare sceAgcSetSemaphoreMemory and sceAgcDriverRegisterMultipleResources 2026-10-06 18:07:53 -06:00
Dean fde401d41f Merge pull request #992 from CnRJay/feat/ppsa23566-missing-exports
feat(libs): declare the exports PPSA23566 imports that no library provides
2026-10-07 13:02:56 +13:00
hugodearaujoandClaude Opus 5.5 26eec5bee6 feat(libSceAgc): implement sceAgcDcbQueueEndOfShaderActionGetSize
The end-of-shader action is written by an inline SDK builder as a
RELEASE_MEM packet, so the size is the 32 bytes that
sceAgcCbReleaseMem writes and that sceAgcAcbQueueEndOfShaderActionGetSize
already returns.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-06 20:38:14 -03:00
JAB-devandClaude Opus 5.5 e15f1644e3 fix(libSceNgs2.native): reverb as the PS4 libSceNgs2 does
The reverb was a Freeverb-style approximation. It now follows the PS4
firmware 11.00 libSceNgs2.sprx, read and checked against its output: the
input mixed to mono with the library's fixed gains, a 14400-sample buffer
with four reflection taps from the reflection pattern tables and a late
feed, sixteen damped comb filters with a pre-emphasis stage, a signed
selection of combs and four allpasses per output channel, a two-pole room
HF filter, and the library's parameter clamps, crossfades and setup
defaults. The test values are the PS4 library's own output.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-07 01:26:11 +02:00
Adrià ab9437e34d feat(libkernel): implement scePthreadTestcancel and pthread_testcancel (#834) 2026-10-07 11:43:32 +13:00
Dean 25f311fa00 Merge pull request #559 from Phi1ow/implement-login-dialog
feat(logindialog): implement the libSceLoginDialog state machine
2026-10-07 11:41:57 +13:00
Dean b5c1d08bd9 Merge pull request #553 from Phi1ow/implement-userservice-foreground-and-ids
feat(userservice): implement foreground user, registered list, user colour and NP account id
2026-10-07 11:41:16 +13:00
ChadandClaude Opus 5.5 df98b8899e feat(libs): name the PPSA23566 stubs from the shadPS4 NID list and implement sleep
20 of the 31 NIDs have names in shadPS4's aerolib list. They are declared
under those names; POSIX sleep is implemented. The NpPartner001 and Psml
MFSR2 exports stay unnamed.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-06 17:28:39 -05:00
Celegans12 a40fe0b415 fix(shader): throw for constant lane reads outside the host subgroup
A pixel, vertex or tessellation stage whose wave is wider than the host
subgroup runs one guest lane per invocation, so lanes at or above the
subgroup size have no invocation. v_readlane_b32 still shuffled from
them, which Vulkan leaves undefined; a wave64 pixel minimum loop that
reads lanes 31 and 63 can then wait for a value no live lane holds and
hang the GPU.

At one lane per invocation outside compute, a v_readlane_b32 of a
constant lane at or above the host subgroup size, and v_permlanex16_b32
on a subgroup of 16 lanes or fewer, now fail SPIR-V emission. Lanes in
registers still build, so s_ff1_i32_b64 waterfalls are unaffected,
and neither check applies to compute or to two lanes per invocation.

v_permlane16_b32 and v_permlanex16_b32 take the source lane's EXEC from
a ballot, as DPP does, instead of a shuffle from a possibly inactive
invocation.
2026-10-07 00:25:55 +02:00
Celegans12 baa202d241 feat(agc): implement 10_11_11 unorm images through 32-bit uint views
GFX10 image format 30 (10_11_11_UNORM: X and Y are unorm11 in bits
0-21, Z is unorm10 in bits 22-31, per Mesa's gfx10 tables) has no
Vulkan format, so its sampled and storage descriptors threw at decode.

Format 30 now takes the R32_UINT route of 10_11_11_UINT: the driver
binds the raw dwords as R32_UINT and the shader extracts each field and
converts it with the buffer format helpers (NormalizeFormatComponent on
loads, EmitFormatStoreComponent on stores); DST_SEL 1 reads 1.0f.
Samples, gathers, LOD queries, 16-bit data and loads or stores whose
DST_SEL names the missing W channel throw.

Converted textures are now viewed with an identity component mapping,
since the shader applies DST_SEL itself: a 10_11_11_UINT view whose X
selector was not X lost the packed dword. DCC clear codes 0001 and 1110
of a converted texture throw instead of filling one R32_UINT channel.
2026-10-07 00:11:27 +02:00